Semiconductor devices using copper (Cu) having low resistance as a material for wirings and via conductors have been manufactured. However, the use of Cu requires a bather layer to prevent Cu diffusion. While tantalum (Ta) or a tantalum nitride film (TaN) is typically used for the barrier layer, a self-forming barrier layer using a CuMn alloy instead of Ta and TaN has been recently proposed.
Since a CuMn alloy formed as a film serves as a seed layer, a Cu-plated layer can be directly formed on the CuMn alloy. By annealing after the plating, the Cu-plated layer reacts with an underlying SiO2 layer (an interlayer insulating layer) or water contained therein to form a MnSixOy layer (where x and y are any positive number) or a MnOx layer (where x is any positive number) in a self-aligning manner at a boundary between the SiO2 layer and the CuMn alloy. Since the MnSixOy layer (silicate of Mn element: Mn silicate layer) and the MnOx (Mn oxide layer) become Cu barrier layers, it is possible to reduce the number of manufacturing processes. Manganese oxides may include MnO, Mn3O4, Mn2O3, MnO2 and the like depending on the valence of Mn, which are herein collectively referred to as MnOx (Mn oxide).
In recent years, with high integration and high miniaturization of semiconductor devices, as the distance between wirings becomes smaller, electric capacitance between adjacent wirings (inter-wiring capacitance) is being increased. This causes a phenomenon in which signals transmitted through wirings become slower (signal delay). To avoid this signal delay, a material having a smaller relative dielectric constant (Low-k material) is being used for the interlayer insulating layer. This is because a smaller relative dielectric constant provides smaller inter-wiring capacitance. SiOC, SiOCH and the like containing organic groups such as methyl groups and the like has been raised as proper Low-k materials and there is a trend that C (carbon) is contained in the interlayer insulating layer.
In comparison between the Mn silicate layer and the Mn oxide layer as barrier layers, the Mn silicate layer is considered to be more desirable from the following three viewpoints. 1) The Mn silicate layer is more amorphous and hence has a smaller crystal grain boundary (higher diffusion ability of Cu or O) than the Mn oxide layer, which can result in the improvement of the barrier property. 2) When the Mn oxide layer becomes a silicate by reaction with silicon oxide (SiOx) of the interlayer insulating layer, a volume (film thickness) thereof is reduced. Therefore, since a sectional area of a Cu wiring or a via conductor formed on the surface of the Mn silicate layer increases as much as the reduced amount, the Cu wiring or the via conductor can have low resistance. 3) Since the Mn oxide may take a plurality of states, such as MnO, Mn3O4, Mn2O3, MnO2 and the like, this is unstable because of its change in density and volume. In contrast, the Mn silicate is chemically stable. Once the Mn silicate is formed, since its state is more stable than the Mn oxide, aging degradation of semiconductor devices may be reduced. However, conventionally, it is uncertain which one of the Mn silicate layer and the Mn oxide layer will be formed on the interlayer insulating layer using a Low-k material, which resulted in difficulty in reliably forming the Mn silicate layer on the interlayer insulating layer.